The designed process flow used to fabricate the heterogeneous integrated photodiodes on TFLN Platform. (IMAGE)
Caption
(a) TFLN wafer with pre-defined waveguide and passive components, (b) bare InP/InGaAs wafer, (c) InP/InGaAs wafer and TFLN wafer bonding, (d) InP/InGaAs wafer substrate removal, (e) N mesa dry etch, (f) P mesa dry etch, (g) SU-8 base for CPW pad, and (h) metal electroplating and lift-off.
Credit
by Chao Wei, Youren Yu, Ziyun Wang, Lin Jiang, Zhongming Zeng, Jia Ye, Xihua Zou, Wei Pan, Xiaojun Xie, and Lianshan Yan
Usage Restrictions
Credit must be given to the creator.
License
CC BY