Figure 3. Chip micrograph of 4x8 phased-array relay module implemented by 65-nm CMOS (IMAGE)

Tokyo Institute of Technology

Figure 3. Chip micrograph of 4x8 phased-array relay module implemented by 65-nm CMOS

Caption

The proposed chip is manufactured using a standard 65-nm CMOS technology, and the 4X8 element phased-array relay module is composed by the four chips.

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2021 Symposia on VLSI Technology and Circuits

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