Figure 2 (IMAGE) Toshiba Corporation Caption Toshiba's new scale-out technology: A new multi-chip architecture featuring a partitioned version of the simulated bifurcation algorithm (partitioned SB) and an autonomous synchronization mechanism. Credit Toshiba Corporation Usage Restrictions News organizations may use or redistribute this image, with proper attribution, as part of news coverage of this paper only. License Licensed content Disclaimer: AAAS and EurekAlert! are not responsible for the accuracy of news releases posted to EurekAlert! by contributing institutions or for the use of any information through the EurekAlert system.