Figure 2. Ultra-miniaturized transistors and integrated circuits using 1D mirror twin boundary gates (IMAGE)
Caption
This figure shows an optical microscope image of the integrated circuit based on 1D mirror twin boundary gates (left), a schematic of the ultra-miniaturized transistor and inverter devices that constitute the circuit (center), and the performance evaluation of these devices (right). The 1D mirror twin boundary process developed by the research team was not limited to the miniaturization of individual devices but was successfully used to construct large-area, highly integrated electronic circuits.
Credit
Institute for Basic Science
Usage Restrictions
Attribution Required
License
Original content