Increasingly smaller and faster semiconductor circuitry has fueled an information technology boom over the past four decades, producing cheaper and more powerful computing devices that have boosted virtually every aspect of our economy. But fundamental limits imposed by the laws of physics threaten to halt continued miniaturization, clouding the future of silicon-based semiconductors.
A paper published in the September 14 issue of the journal Science provides some good news: though significant challenges lie ahead, the semiconductor industry has the potential for at least two more decades of continuing miniaturization. That opportunity should encourage the research necessary to master nanometer-scale technologies needed to overcome these challenges, the paper's author contends.
"The laws of physics reveal the potential for 20 more years of exponential progress ahead of us," said James D. Meindl, professor of electrical and computer engineering and director of the Microelectronics Research Center at the Georgia Institute of Technology. "If the engineers are clever enough - which historically they have been - they will be able to find ways to produce the nanoelectronic structures that physics says are feasible and reasonable."
Based on a comprehensive analysis of the fundamental, material, device, circuit and system limits on silicon semiconductors, Meindl predicts engineers will be able to downsize transistors by a additional factor of ten, producing terascale integration chips containing more than a trillion transistors. (Chips poised for production today contain a billion transistors).
Understanding the fundamental limits governing future miniaturization should give semiconductor companies the confidence to pursue costly nanotechnology innovations necessary to produce the trillion-transistor chips. The Georgia Tech paper is the first to provide a comprehensive look at those limits.
"It is reassuring to know that you are not fighting against a law of physics," Meindl said. "Knowing the fundamental limits gives you hope that cleverness can produce the inventions that you need to continue miniaturization. Now that the fundamental limits have been pinned down, we can start to see what other factors will impede us as we approach this limit."
The semiconductor industry publishes an annual "roadmap" that lays out the challenges expected for the next 15 years. White blocks represent proven solutions, yellow blocks show where promising technologies exist, and red blocks define challenges without solutions. The term "red brick wall" describes portions of the map containing large numbers of red squares - and hence the greatest challenges.
"The red brick wall for the industry is now pretty serious, even five years from now," Meindl said. "But that has been the case generally for the industry, which has always needed clever inventions that couldn't be predicted. In order to keep this technology going, we'll have to turn those red squares to yellow and white."
To produce trillion-transistor chips, he noted, the industry must be able to economically mass-produce structures on the nanometer-size scale. That means double-gate metal-oxide-semiconductor field effect transistors (MOSFETs) with gate oxide thicknesses of about one nanometer, silicon channel thicknesses of about three nanometers and channel lengths of about 10 nanometers - along with nanoscale wires for interconnecting such tiny components.
The fundamental limit defines the minimum amount of energy needed to perform the most basic computing operation: binary logic switching that changes a 0 to a 1, or vice-versa. Meindl and collaborators Jeffrey A. Davis and Qiang Chen found that the fundamental limit depends on just one variable: the absolute temperature. Based on this fundamental limit, they studied a hierarchy of limits that are much less absolute because they depend on assumptions about the operation of devices, circuits and systems.
The researchers studied the fundamental limit from two different perspectives: the minimum energy required to produce a binary transition that can be distinguished, and the minimum energy necessary for sending the resulting signal along a communications channel. The result was the same in both cases.
The fundamental limit, expressed as E(min) = (ln2)kT, was first reported 50 years ago by electrical engineer John von Neumann, who never provided an explanation for its derivation. (In this equation, T represents absolute temperature, k is Boltzmann's constant, and ln2 is the natural log of 2).
Though this fundamental limit provides the theoretical stopping point for electrical and computer engineers, Meindl says no device will ever operate close to it because designers will first bump into the higher-level limits. For example, electronic signals can move through interconnects no faster than the speed of light. And quantum mechanical theory sets minimum size restrictions on devices.
Though the limits provide a final barrier to innovation, Meindl believes economic realities will bring about the real end to advances in silicon microelectronics.
"What has enabled the computer revolution so far is that the cost per function has continued to decrease," he said. "It is likely that after a certain point, we will not be able to continue to increase productivity. We may no longer be able to see investment pay off in reduced cost per function. Because the stakes are getting so high in terms of factories needed to turn out these denser and denser chips, the number of companies that can afford the multi-billion dollar factories has been dwindling."
The future of silicon semiconductors ultimately depends on nanotechnology.
"What happens next is what nanotechnology research is trying to answer," Meindl said. "Work that is going on in nanotechnology today is trying to create a discontinuity and jump to a brand new science and technology base. Fundamental physical limits encourage the hypothesis that silicon technology provides a singular opportunity for exploration of nanoelectronics."
The research has been sponsored by the Defense Advanced Research Projects Agency under Contract F33615-97-C1132, the Semiconductor Research Corporation under Contract HJ-374 and the Georgia Institute of Technology.
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