Schematic Image of a NC-FET (IMAGE) American Institute of Physics Caption Transistors have been miniaturized for the past 50 years, but we've reached the point where they can't continue to be scaled any further. In Applied Physics Letters, researchers review negative capacitance field-effect transistors, a new device concept that suggests traditional transistors can be made much more efficient by simply adding a thin layer of ferroelectric material. If it works, the same chip could compute far more, yet require less frequent charging of its battery. This is a schematic image of a NC-FET where a CMOS-compatible ferroelectric HZO layer is part of the gate stack to realize negative capacitance in the gate stack and sub-60 mV/dec transistor operation. Credit Peide D. Ye Usage Restrictions Journalists may use this image with appropriate credit. License Licensed content Disclaimer: AAAS and EurekAlert! are not responsible for the accuracy of news releases posted to EurekAlert! by contributing institutions or for the use of any information through the EurekAlert system.